Background

In Micron Technology Inc. v. Godo Kaisha IP Bridge 1, IPR2020-01007, Paper 36 (P.T.A.B. Dec. 1, 2021), the Patent Trial and Appeal Board found claims 1−17 of U.S. Patent No. 6,424,041, which described semiconductor devices designed to prevent copper from diffusing from wiring into memory storage regions, unpatentable. The Board’s decision, which determined that the claims were unpatentable as obvious in light of the prior art, undertook both a claim construction and obviousness determination.

Claim Construction

The Board’s decision construed two terms: “memory storage portion” and “copper-diffusion blocking means.” The primary dispute regarding “memory storage portion” was whether it must contain “access circuitry.” The Patent Owner argued that the “memory storage portion” must include access circuitry. After reviewing the specification, the Board construed “memory storage portion” to mean “the region where at least the components that are used for the storage of information are located” and determined that no access circuitry was required. Id. at *23. Then, the Board took to determining the meaning of the term “copper-diffusion blocking means,” which was a means-plus-function limitation under 35 U.S.C. § 112. To construe this term, the Board determined what the claimed function was and identified the structures or materials disclosed in the specification that corresponded to the means for performing that function. Considering the specification, the Board agreed with the Petitioner’s proposed construction that the claimed function of the term was “blocking copper diffusion from said wiring portion toward said memory storage portion,” and the corresponding structures were a ceiling film or a vertical wall, and equivalents of these. Id. at *28.

Obviousness

The Board determined that Petitioner made a sufficient showing that claims 1−17 would have been obvious in light of two prior art references, Kishii and Ryan.

The parties disputed whether Kishii taught “a memory storage portion on a main surface of said semiconductor substrate.” Id. at *32. The petitioner argued that Kishii’s stacked fin capacitor was a memory storage portion. The patent owner disputed this contention, arguing that the petitioner did not show that Kishii’s capacitor stored information and the stacked fin capacitor may be used for a different purpose in dynamic random-access memory (“DRAM”), such as a decoupling capacitor that does not store information. Petitioner offered expert testimony, which cited examples where a stacked-fin capacitor had been previously used in a DRAM memory cell, as opposed to decoupling circuitry. The Board was persuaded by Petitioner’s expert and found Kishii’s stacked-fin capacitor was a portion or component of a semiconductor device that stored information.  

Next, the Board determined that a person of ordinary skill in the art would have been reasonably motivated to combine Kishii and Ryan to teach using a copper wire, as required by claim 1, given Ryan’s teaching that copper was a preferred material for such interconnect layers due to its low resistivity, low cost, and enhanced reliability. The Board found the final limitation of claim 1 was taught by Kishii, which was determined to teach a protective film that was “structurally indistinguishable” from the ’041 patent and performed the same claimed function as claim 1 required.

Additionally, the Board determined that petitioner made a sufficient showing that claims 13 and 14 would have also been obvious over Liang and El-Kareh. Claims 13 and 14 added the claim limitation - “wherein the memory storage portion is a memory storage portion for accumulating and releasing charges according to information.” Id. at *59. Combining the prediction from El-Kareh that protection against degradation would be necessary, and Liang’s ability to protect against said degradation, the Board determined that the two references taught a reasonable expectation of success for the limitation of claims 13 and 14.